Pentek Hardware Overview
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Overview
- The Pentek system we have consists of three components
- The 4205 Carrier Board
- The 6256 Digital Downconverter
- The 6228 Digital Upconverter
A successful application requires that each of these components work in sync with one another. Pentek has written software, described in the manuals, which can be used to perform various simple tasks such as reading data, writing data, etc. Building more useful programs involves making modifications to this default software. This may be as simple as tweaking an existing C program or as complex as writing a new FPGA configuration and the associated C-code. Note that an FPGA configuration on the 6256 or 6228 must be run with the appropriate C-code on the 4205. If a mismatched configuration is used, the system will not work.
The VIM Interface
The 6256 and 6228 are daughterboards which interface to the 4205 via the VIM-2 interface. VIM-2 refers to the fact that each card takes up two adjacent VIM (Velocity Interface Module, a Pentek standard) connectors. The VIM interface is actually two seperate interfaces: a 32-bit data interface and a 32-bit control/status interface. Both interfaces also have some additional control/status bits.
The four VIM slots on the 4205 are labeled with the letters A through D. When the 4205 is mounted vertically in a VME card cage, the slots are A,B,C,D from top to bottom. So the top duaghterboard will occupy VIM A and VIM B while the bottom one will occupy CIM C and VIM D.
The VME Interface
The 4205 board itself connects to a VME-64 backplane. One function of this backplane is to provide power to the boards. The other function is to provide an interface which can be used to link different cards in the same cage. At the moment the only application for this is to interface the Acromag card with the 4205. Once someone actually does this, they should post relevant instructions.
The 6256 Digital Downconverter
The 6256 Digital Downconverter is used to read signals into the Pentek board. There are four channels, each of which is interfaced to an SMA connector on the front-panel of the 6256 (labeled Ch. 1 - Ch. 4). The signal passes through a transformer with a -3dB point at 400 kHz before being read by a 14-bit ADC. Signals below ~300 kHz cannot be measured using the 6256. The input impedence is 
and the full-scale input amplitude is +4 dBm.
The heart of the 6256 are two Xilinx Viretx-II Pro FPGAs (model xc2vp50). They are responsible for processing the ADC data, placing data on the VIM-2 interface, reading the commands on the control interface from the 4205, and running the other components on the 6256 (clocks, ADCs, etc.). Pentek provides a default configuration, the behavior of which is described in the 6256 manual. Essentially it can be used to configure the 6256 and read data directly from the ADCs. Additional functions, such as filters and phasemeter front-ends are implemented using a custom configuration. For more information see Programming Pentek FPGAs.
The 6228 Digital Upconverter
The 6228 Digital Upconverter is used to output signals from the Pentek board. There are four channels, each of which is interfaced to an SMA connector on the front-panel of the 6228 (labeled Ch. 1 - Ch. 4). The signal generated by the 16-bit ADC passes through a transformer with a -3dB point at 400 kHz before reaching the SMA connector. Signals below ~300 kHz cannot be generated using the 6228. The output impedence is and the full-scale input amplitude is -2 dBm.
The 6228 contains a single FPGA, a Xilinx Virtex-II (model xc2v1000). It is responsible for reading data off the VIM, unpacking and processing it, sending it to the DACs, running the control registers, and running other components on the board (filters, LVDS bus, etc). Pentek provides a default configuration, the behavior of which is described in the 6228 manual. Essentially it can be used to configure the 6228 and write data directly from the VIM interface to the DACs. Additional functions, such as NCOs are implemented using a custom configuration. For more information see Programming Pentek FPGAs.
The 4205 Carrier Board
The 4205 carrier board is the main component of the Pentek system. It is a microprocessor based system, just like your PC. It has a 1GHz PowerPC CPU, 1 GB of SDRAM, flash memory, and a bunch of other interfaces. Read the 4205 manual if you're interested.
At a basic level, a program for the 4205 is a list of instructions for the processor. The processor views the entire rest of the board (and the rest of the world) as locations in memory (addresses). For example, the SDRAM occupies the addresses from 0x00000000 - 0x3FFFFFFF. A table of these memory adresses is in Table 3-1 in the 4205 Operating Manual.
Theoretically, you could write an entire program that just consists of memory reads and writes for the processor. This would be exceedingly tedious so instead we program in C (not C++) and then compile the C code with a set of operating-system libraries. We use eCos, which is essentially a stripped-down version on Linux. It is the open-source competitor to the better-known VxWorks.
In addition Pentek has provided a set of libraries that contain data structures, macros (in ALL CAPS) and functions (with TheCapsLikeThis) that allow the user to access various memory values. These macros and functions make up the software packages known as ReadyFlow. For example, the macro P4205_LED_ON(P4205_BOARD_CNTL_STATUS, P4205_FP_LED0) will turn on LED 0 on the front panel of the 4205. The configuration programs for the 4205 are basically a combination of generic C code for program flow and math operations and board-specific macros for accessing the hardware.
A list of C-code for programs in the 4205 can be found in Programs for the 4205
